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Senior Hardware Design Engineer Full-time

Published at 2019-05-17 - Viewed: 2652 times - lowRISC (Worldwide/Remote)

Senior Hardware Design Engineer

  • Cambridge, Cambridgeshire, United Kingdom
  • Full Time
  • Student (College)

Company Overview

lowRISC is a non-profit community interest company, using collaborative engineering to develop and maintain open source silicon designs and tools. We are producing high-quality, security-focused, open, and flexible IP.  Our expertise includes processor and SoC design — with a particular focus on hardware security, design verification, RISC-V tools, and the LLVM compiler.

This role would be an exciting position for a skilled engineer who will appreciate the freedom to explore and invent in the open. lowRISC provides the opportunity to work within a team exploring the full hardware/software stack on a broad range of challenging projects.  

Job Summary

The successful candidate will have demonstrated expertise in computer architecture and hardware design. The role will focus on our 64-bit RISC-V SoC reference design: specifying the high-level architecture, integrating IP, and managing the delivery of regular public releases. lowRISC is an ambitious project with a small core team, so you will be heavily involved in the project’s development direction. This role will involve frequent work with external contributors and collaborators, and interaction with the wider open source community.

Practical experience using an HDL such as Verilog/SystemVerilog for hardware design is essential, as is a good knowledge of the HW/SW stack. Candidates should also have experience or demonstrated interest in some of: SoC design, large-scale open source development, hardware or software security.

You must have the right to work in the UK. Starting salary is 40-65K GBP depending on experience. Benefits include a generous employer pension contribution (up to 12.5%) and holiday allowance (33 days including public holidays). You will join us at our offices in ideaSpace West, Cambridge.

Closing date: 16th June 2019


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